High-level synthesis of ΔΣ modulator topologies optimized for complexity, sensitivity, and power consumption

Hua Tang, Alex Doboli

Research output: Contribution to journalArticlepeer-review

51 Scopus citations


This paper proposes a novel topology-synthesis methodology for single-loop single-bit ΔΣ modulators. The goal is to explore all possible topologies and to obtain the optimal topology under various design considerations, such as hardware complexity, modulator sensitivity, and power consumption. A generic modulator architecture that incorporates all possible feedback and feedforward signal paths was defined and the symbolic noise transfer function (NTF) and signal transfer function (STF) for the generic topology were derived. The symbolic functions were then used to formulate the topology-exploration problem as a mixed-integer nonlinearly constrained programming (MINLP) problem that simultaneously generates and selects the optimal modulator topology with respect to the cost function. Experiments show the superiority of synthesized topologies as compared to traditional modulator topologies.

Original languageEnglish (US)
Pages (from-to)597-607
Number of pages11
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Issue number3
StatePublished - Mar 2006

Bibliographical note

Funding Information:
Manuscript received October 22, 2004; revised February 15, 2005. This work was supported by Defense Advanced Research Projects Agency (DARPA) and managed by the Sensors Directorate of the Air Force Research Laboratory, United States Air Force (USAF), Wright–Patterson Air Force Base (AFB), Dayton, OH 45433-6543 USA. This paper was recommended by Associate Editor C.-J. R. Shi.


  • Delta-sigma modulator
  • Sensitivity
  • Synthesis
  • Topology


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