High frequency analog circuit design using QuickChip

S. G. Burns

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The author describes analog circuit design methodologies and techniques required to optimize high frequency performance when operating near the upper frequency limit of BJT-based analog ASICs. The Tektronix QuickChip 2S ASIC array is used as the analysis and test vehicle. These techniques are illustrated using a series of examples including an actively shunt-peaked wideband amplifier and a multi-chip FM receiver as well as an analysis of the need to optimize the RC product in the manual routing of both metallizations in critical areas of the circuit.

Original languageEnglish (US)
Title of host publicationProceedings - 1st Great Lakes Symposium on VLSI, GLSV 1991
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages196-201
Number of pages6
ISBN (Electronic)0818621702, 9780818621703
DOIs
StatePublished - 1991
Externally publishedYes
Event1st Great Lakes Symposium on VLSI, GLSV 1991 - Kalamazoo, United States
Duration: Mar 1 1991Mar 2 1991

Publication series

NameProceedings - 1st Great Lakes Symposium on VLSI, GLSV 1991

Conference

Conference1st Great Lakes Symposium on VLSI, GLSV 1991
Country/TerritoryUnited States
CityKalamazoo
Period3/1/913/2/91

Bibliographical note

Publisher Copyright:
© 1991 IEEE.

Copyright:
Copyright 2020 Elsevier B.V., All rights reserved.

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