TY - GEN
T1 - Hierarchical pipelining and folding of QRD-RLS adaptive filters
AU - Gao, Lijun
AU - Parhi, Keshab K.
PY - 2000/1/1
Y1 - 2000/1/1
N2 - A novel approach for hierarchically pipelining and folding the CORDIC-based systolic triangular array of a QRD-RLS filter to a small fixed size array is presented. With the annihilation-reordering look-ahead transformation, the iteration bound of a QRD-RLS filter can be reduced proportional to the look-ahead level. This paper presents, for the first time, how to pipeline and fold such a look-ahead transformed QRD-RLS array in a hierarchical way. Compared to the previously published mapping algorithms, this approach has low complexity and can result in a physical array of any size. Therefore, it is of great significance for ASIC chip designs and high-level synthesis. Besides, it is shown how a combination of look-ahead, pipelining and folding transformations can lead to an increase in throughput, a large reduction in area or a great saving in power consumption.
AB - A novel approach for hierarchically pipelining and folding the CORDIC-based systolic triangular array of a QRD-RLS filter to a small fixed size array is presented. With the annihilation-reordering look-ahead transformation, the iteration bound of a QRD-RLS filter can be reduced proportional to the look-ahead level. This paper presents, for the first time, how to pipeline and fold such a look-ahead transformed QRD-RLS array in a hierarchical way. Compared to the previously published mapping algorithms, this approach has low complexity and can result in a physical array of any size. Therefore, it is of great significance for ASIC chip designs and high-level synthesis. Besides, it is shown how a combination of look-ahead, pipelining and folding transformations can lead to an increase in throughput, a large reduction in area or a great saving in power consumption.
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U2 - 10.1109/ICASSP.2000.860101
DO - 10.1109/ICASSP.2000.860101
M3 - Conference contribution
AN - SCOPUS:0033709730
T3 - ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings
SP - 3283
EP - 3286
BT - Design and Implementation of Signal Processing SystemNeural Networks for Signal Processing Signal Processing EducationOther Emerging Applications of Signal ProcessingSpecial Sessions
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 25th IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2000
Y2 - 5 June 2000 through 9 June 2000
ER -