Abstract
Hardware obfuscation has been proposed as a hardware security measure against reverse engineering, intellectual property (IP) piracy and integrated circuits (IC) overbuilding. In this paper, we present a novel method of obfuscation using a hierarchical approach. In the design flow, IP vendors obfuscate their designs using a set of keys and provide these keys to the design house. The design house then integrates all the IPs and adds its own keys to create a complete obfuscated system. This prevents both misuse of IPs and illegal use of ICs since only secure parties have access to the correct keys. The obfuscation at each level is performed using a mode-based approach in which the design can operate in meaningful and non-meaningful modes. The design is functionally correct in only one mode. An attacker needs to work through different levels of the design to correctly decipher its operation and correct working mode. Since each of the IPs can work in multiple meaningful modes, the attack becomes more difficult as the number of IPs increases. These ideas are demonstrated using a convolution architecture with fast Fourier transform (FFT) blocks. With only about 13% area and 15% power overhead over an unobfuscated design, it is shown that the proposed design has the flexibility to be obfuscated with different key sizes and overheads depending on the level of security.
Original language | English (US) |
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Title of host publication | IEEE International Symposium on Circuits and Systems |
Subtitle of host publication | From Dreams to Innovation, ISCAS 2017 - Conference Proceedings |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
ISBN (Electronic) | 9781467368520 |
DOIs | |
State | Published - Sep 25 2017 |
Event | 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 - Baltimore, United States Duration: May 28 2017 → May 31 2017 |
Publication series
Name | Proceedings - IEEE International Symposium on Circuits and Systems |
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ISSN (Print) | 0271-4310 |
Other
Other | 50th IEEE International Symposium on Circuits and Systems, ISCAS 2017 |
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Country/Territory | United States |
City | Baltimore |
Period | 5/28/17 → 5/31/17 |
Bibliographical note
Publisher Copyright:© 2017 IEEE.
Keywords
- Hardware obfuscation
- Hardware security
- Hierarchical obfuscation
- Reverse engineering