Hibachi: A Cooperative Hybrid Cache with NVRAM and DRAM for storage arrays

Ziqi Fan, Fenggang Wu, Dongchul Parkx, Jim Diehl, Doug Voigty, David H.C. Du

Research output: Contribution to conferencePaper

12 Scopus citations

Abstract

Adopting newer non-volatile memory (NVRAM) technologies as write buffers in slower storage arrays is a promising approach to improve write performance. However, due to DRAMs merits, including shorter access latency and lower cost, it is still desirable to incorporate DRAM as a read cache along with NVRAM. Although numerous cache policies have been proposed, most are either targeted at main memory buffer caches, or manage NVRAM as write buffers and separately manage DRAM as read caches. To the best of our knowledge, cooperative hybrid volatile and non-volatile memory buffer cache policies specifically designed for storage systems using newer NVRAM technologies have not been well studied. This paper, based on our elaborate study of storage server block I/O traces, proposes a novel cooperative HybrId NVRAM and DRAM Buffer cACHe polIcy for storage arrays, named Hibachi. Hibachi treats read cache hits and write cache hits differently to maximize cache hit rates and judiciously adjusts the clean and the dirty cache sizes to capture workloads tendencies. In addition, it converts random writes to sequential writes for high disk write throughput and further exploits storage server I/O workload characteristics to improve read performance. We evaluate Hibachi on real disk arrays as well as our simulator. The results show that Hibachi outperforms existing work in both read and write performance.

Original languageEnglish (US)
StatePublished - 2017
Event33rd International Conference on Massive Storage Systems and Technology, MSST 2017 - Santa Clara, United States
Duration: May 15 2017May 19 2017

Conference

Conference33rd International Conference on Massive Storage Systems and Technology, MSST 2017
CountryUnited States
CitySanta Clara
Period5/15/175/19/17

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