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HBucnna: Hybrid binary-unary convolutional neural network accelerator
Rasoul Faraji
, Pierre Abillama
, Gaurav Singh
,
Kia Bazargan
Electrical and Computer Engineering
Research output
:
Chapter in Book/Report/Conference proceeding
›
Conference contribution
8
Scopus citations
Overview
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Keyphrases
Unary
100%
Convolutional Neural Network Accelerator
100%
Convolutional Neural Network
60%
Field Programmable Gate Arrays
40%
Computational Power
40%
Convolutional Layer
40%
Constant Coefficient Multiplier
40%
High Performance
20%
Reconfigurable
20%
Control Signal
20%
Reconfiguration
20%
Latency
20%
Hardware Cost
20%
Numerics
20%
Inference Tasks
20%
Pipeline Parallelism
20%
Memory Bandwidth
20%
Power Energy
20%
Memory Footprint
20%
Convolution Kernel
20%
Accelerator Architectures
20%
Batch Normalization
20%
Binary Architecture
20%
CNN Accelerator
20%
Bandwidth Limitation
20%
ResNet18
20%
Computer Science
Convolutional Neural Network
100%
Constant Coefficient
33%
Computational Power
33%
Convolutional Layer
33%
Field Programmable Gate Arrays
33%
Control Signal
16%
Hardware Cost
16%
Inference Task
16%
Residual Neural Network
16%
Batch Normalization
16%
Bandwidth Requirement
16%
Memory Bandwidth
16%
Memory Footprint
16%