Hardware implementation of a novel reduced rating active filter for 3-phase, 4-wire loads

Girish Kamath, Ned Mohan, Vernon D. Albertson

Research output: Contribution to conferencePaper

39 Scopus citations

Abstract

This paper presents the hardware results of a new active filter topology with reduced VA rating for 3-phase, 4-wire loads. The scheme consists of a single-phase inverter connected between the zig-zag transformer neutral and the utility neutral in addition to a three-phase inverter connected to the delta winding of the zig-zag transformer. Compared to other reported schemes, the inverter VA rating in this scheme is reduced by a factor of six. This reduction in the inverter VA rating is mainly due to the zero-sequence current inverter having a low VA rating. The equations for this active filter are derived. The simulation results are verified by means of experimental results from a proof-of-concept prototype.

Original languageEnglish (US)
Pages984-989
Number of pages6
StatePublished - 1995
EventProceedings of the 1995 IEEE 10th Annual Applied Power Electronics Conference. Vol 1 (of 2) - Dallas, TX, USA
Duration: Mar 5 1995Mar 9 1995

Other

OtherProceedings of the 1995 IEEE 10th Annual Applied Power Electronics Conference. Vol 1 (of 2)
CityDallas, TX, USA
Period3/5/953/9/95

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    Kamath, G., Mohan, N., & Albertson, V. D. (1995). Hardware implementation of a novel reduced rating active filter for 3-phase, 4-wire loads. 984-989. Paper presented at Proceedings of the 1995 IEEE 10th Annual Applied Power Electronics Conference. Vol 1 (of 2), Dallas, TX, USA, .