Hardware Acceleration of Inference on Dynamic GNNs

Sudipta Mondal, Sachin S. Sapatnekar

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Dynamic graph neural networks (DGNNs) play a crucial role in applications that require inferencing on graph-structured data, where the connectivity and features of the graph evolve over time. The proposed platform integrates graph neural network (GNN) and recurrent neural network (RNN) components of DGNNs, providing a unified platform that captures spatial and temporal information. Novel contributions include optimized cache reuse, a novel caching policy, and efficient GNN-RNN pipelining. Average energy efficiency gains of 8393X, 183x, and 87X - 10X, and inference speedups of 1796X, 77X, and 21x - 2.4X, over Intel Xeon Gold CPU, NVIDIA V100 GPU, and prior approaches, respectively, are demonstrated across multiple graph datasets and multiple DGNNs.

Original languageEnglish (US)
Title of host publicationProceedings of the 29th International Symposium on Low Power Electronics and Design, ISLPED 2024
PublisherAssociation for Computing Machinery, Inc
ISBN (Electronic)9798400706882
StatePublished - Aug 5 2024
Event29th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2024 - Newport Beach, United States
Duration: Aug 5 2024Aug 7 2024

Publication series

NameProceedings of the 29th International Symposium on Low Power Electronics and Design, ISLPED 2024

Conference

Conference29th ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2024
Country/TerritoryUnited States
CityNewport Beach
Period8/5/248/7/24

Bibliographical note

Publisher Copyright:
© 2024 Copyright is held by the owner/author(s). Publication rights licensed to ACM.

Keywords

  • dynamic graphs
  • GNN
  • hardware accelerator
  • RNN

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