Parameter extraction of compact transistor models is an expensive process, heavily relying on engineering knowledge and experience. To automate such a process, we propose a novel approach, Graph-based Compact Model (GCM), that integrates physical modeling and data-driven learning. GCM utilizes Graph Neural Networks (GNNs) to establish the model structure, while retaining the physicality in compact models. We implement our GCM in Verilog-A to support circuit simulations. As demonstrated with an academic 7nm FinFET PDK, the new approach automatically generates a GCM model within a minute, and achieves excellent accuracy and efficiency in SPICE.
Bibliographical noteFunding Information:
This work is partially supported by the Defense Advanced Research Projects Agency (DARPA), United States under the program of Low Temperature Logic Technology (LTLT). It is also supported in part by the U.S. Department of Energy , through the Office of Advanced Scientific Computing Research’s “Data-Driven Decision Control for Complex Systems (DnC2S)” project.
© 2023 Elsevier Ltd
- Circuit simulation
- Graph Neural Networks (GNNs)
- Graph-based Compact Model (GCM)
- Machine learning