Abstract
Numerous solutions to the problem of detailed routing of wires on a chip have been proposed for two routing layers but few are general enough to also handle switchboxes, more than two layers, variable channel widths, or multiple-layer problems with stacked terminals (3-D routing) without extensive modifications. A different routing approach that not only can solve the two layer problem but the other problems as well is proposed. The inherent parallelism of the approach resulted in a coarse-grained parallel algorithm.
| Original language | English (US) |
|---|---|
| Title of host publication | Proceedings - Design Automation Conference |
| Publisher | IEEE |
| Pages | 637-640 |
| Number of pages | 4 |
| ISBN (Print) | 0818607815, 9780818607813 |
| DOIs | |
| State | Published - 1987 |
Publication series
| Name | Proceedings - Design Automation Conference |
|---|---|
| ISSN (Print) | 0146-7123 |
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Cite this
Enbody, R. J., & Du, H. C. (1987). GENERAL PURPOSE ROUTER. In Proceedings - Design Automation Conference (pp. 637-640). (Proceedings - Design Automation Conference). IEEE. https://doi.org/10.1145/37888.37989