Ferroelectric tunneling junctions (FTJs) have attracted great interest due to their potential applications in non-volatile memories and neurosynaptic computing. In this work, high performance FTJs constructed with graphene and two-dimensional (2D) layered ferroelectric CuInP2S6 (CIPS) with out-of-plane polarization have been demonstrated. These van der Waals (vdW) heterostructure tunneling devices show tunneling electroresistance (TER) up to 107. Furthermore, the FTJs exhibit noticeable gate tunability, for which the on-state tunneling current can increase by 100% by applying a 50 V gate voltage through the conventional 260-nm-thick SiO2 dielectric layer. Our demonstration of gate-tunable, giant tunneling electroresistance highlights its potential in energy-efficient non-volatile memories and computing-in-memory functions.
|Original language||English (US)|
|Journal||Materials Science and Engineering B: Solid-State Materials for Advanced Technology|
|State||Published - Sep 2022|
Bibliographical noteFunding Information:
C.G. acknowledges the support from the startup grant from the University of Maryland, College Park, and the grants from Northrop Grumman Mission Systems’ University Research Program, Naval Air Warfare Center Aircraft Division, and Army Research Laboratory cooperative agreement number W911NF-19-2-0181. J.P.W. acknowledges the support of Robert F. Hartmann Endowed Chair Professorship. M.A.S. and B.S.C. acknowledge support through the United States Air Force Office of Scientific Research (AFOSR) LRIR 18RQCOR100 and AOARD-MOST Grant Number F4GGA21207H002. B.S.C. further acknowledges the National Research Council Senior Fellowship award.
© 2022 Elsevier B.V.
- Ferroelectric tunneling junctions (FTJs)
- Tunneling electroresistance (TER) effect