Fully integrated capacitive converter with all digital ripple mitigation

Sudhir S. Kudva; Ramesh Harjani

doi:10.1109/CICC.2012.6330630

Fully integrated capacitive converter with all digital ripple mitigation

Sudhir S. Kudva, Ramesh Harjani

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Scopus citations

Abstract

This paper presents an adaptive all digital ripple mitigation technique for fully integrated capacitive converters. Ripple control is achieved using a two pronged approach where coarse ripple control is achieved by varying the size of the bucket capacitance and fine control is achieved by charge/discharge time modulation of the bucket capacitors used to transfer the charge between the input and output. A dual loop control was used to achieve regulation and ripple control. The fully-integrated converter was implemented in IBM's 130nm CMOS. Enabling ripple mitigation, reduces the measured ripple by 65% for a load of 0.4V and 2mA without significantly impacting the converter core efficiency.

Original language	English (US)
Title of host publication	Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012
DOIs	https://doi.org/10.1109/CICC.2012.6330630
State	Published - Nov 26 2012
Event	34th Annual Custom Integrated Circuits Conference, CICC 2012 - San Jose, CA, United States Duration: Sep 9 2012 → Sep 12 2012

Publication series

Name	Proceedings of the Custom Integrated Circuits Conference
ISSN (Print)	0886-5930

Other

Other	34th Annual Custom Integrated Circuits Conference, CICC 2012
Country/Territory	United States
City	San Jose, CA
Period	9/9/12 → 9/12/12

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10.1109/CICC.2012.6330630

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Kudva, SS & Harjani, R 2012, Fully integrated capacitive converter with all digital ripple mitigation. in Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012., 6330630, Proceedings of the Custom Integrated Circuits Conference, 34th Annual Custom Integrated Circuits Conference, CICC 2012, San Jose, CA, United States, 9/9/12. https://doi.org/10.1109/CICC.2012.6330630

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title = "Fully integrated capacitive converter with all digital ripple mitigation",

abstract = "This paper presents an adaptive all digital ripple mitigation technique for fully integrated capacitive converters. Ripple control is achieved using a two pronged approach where coarse ripple control is achieved by varying the size of the bucket capacitance and fine control is achieved by charge/discharge time modulation of the bucket capacitors used to transfer the charge between the input and output. A dual loop control was used to achieve regulation and ripple control. The fully-integrated converter was implemented in IBM's 130nm CMOS. Enabling ripple mitigation, reduces the measured ripple by 65% for a load of 0.4V and 2mA without significantly impacting the converter core efficiency.",

author = "Kudva, {Sudhir S.} and Ramesh Harjani",

year = "2012",

month = nov,

day = "26",

doi = "10.1109/CICC.2012.6330630",

language = "English (US)",

isbn = "9781467315555",

series = "Proceedings of the Custom Integrated Circuits Conference",

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note = "34th Annual Custom Integrated Circuits Conference, CICC 2012 ; Conference date: 09-09-2012 Through 12-09-2012",

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N2 - This paper presents an adaptive all digital ripple mitigation technique for fully integrated capacitive converters. Ripple control is achieved using a two pronged approach where coarse ripple control is achieved by varying the size of the bucket capacitance and fine control is achieved by charge/discharge time modulation of the bucket capacitors used to transfer the charge between the input and output. A dual loop control was used to achieve regulation and ripple control. The fully-integrated converter was implemented in IBM's 130nm CMOS. Enabling ripple mitigation, reduces the measured ripple by 65% for a load of 0.4V and 2mA without significantly impacting the converter core efficiency.

AB - This paper presents an adaptive all digital ripple mitigation technique for fully integrated capacitive converters. Ripple control is achieved using a two pronged approach where coarse ripple control is achieved by varying the size of the bucket capacitance and fine control is achieved by charge/discharge time modulation of the bucket capacitors used to transfer the charge between the input and output. A dual loop control was used to achieve regulation and ripple control. The fully-integrated converter was implemented in IBM's 130nm CMOS. Enabling ripple mitigation, reduces the measured ripple by 65% for a load of 0.4V and 2mA without significantly impacting the converter core efficiency.

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DO - 10.1109/CICC.2012.6330630

M3 - Conference contribution

AN - SCOPUS:84869480391

SN - 9781467315555

T3 - Proceedings of the Custom Integrated Circuits Conference

BT - Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012

T2 - 34th Annual Custom Integrated Circuits Conference, CICC 2012

Y2 - 9 September 2012 through 12 September 2012

ER -

Fully integrated capacitive converter with all digital ripple mitigation

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