Fully integrated capacitive converter with all digital ripple mitigation

Sudhir S. Kudva, Ramesh Harjani

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

This paper presents an adaptive all digital ripple mitigation technique for fully integrated capacitive converters. Ripple control is achieved using a two pronged approach where coarse ripple control is achieved by varying the size of the bucket capacitance and fine control is achieved by charge/discharge time modulation of the bucket capacitors used to transfer the charge between the input and output. A dual loop control was used to achieve regulation and ripple control. The fully-integrated converter was implemented in IBM's 130nm CMOS. Enabling ripple mitigation, reduces the measured ripple by 65% for a load of 0.4V and 2mA without significantly impacting the converter core efficiency.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE 2012 Custom Integrated Circuits Conference, CICC 2012
DOIs
StatePublished - Nov 26 2012
Event34th Annual Custom Integrated Circuits Conference, CICC 2012 - San Jose, CA, United States
Duration: Sep 9 2012Sep 12 2012

Publication series

NameProceedings of the Custom Integrated Circuits Conference
ISSN (Print)0886-5930

Other

Other34th Annual Custom Integrated Circuits Conference, CICC 2012
CountryUnited States
CitySan Jose, CA
Period9/9/129/12/12

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