FPGA-based design of a Pulsed-OFDM System

Kai Chuan Chang, Gerald E Sobelman

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

An enhancement to the MB-OFDM system, known as Pulsed-OFDM, has been proposed to reduce the complexity and power consumption of the transceiver without sacrificing performance. In this paper, we describe the detailed FPGA implementation of a complete Pulsed-OFDM transceiver. The resource requirements are given for each of the major blocks for an implementation using a Xilinx Virtex™-4 device. The entire system can be mapped onto a single FPGA chip.

Original languageEnglish (US)
Title of host publicationAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
Pages1128-1131
Number of pages4
DOIs
StatePublished - 2006
EventAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems - , Singapore
Duration: Dec 4 2006Dec 6 2006

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Other

OtherAPCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems
Country/TerritorySingapore
Period12/4/0612/6/06

Keywords

  • FPGA
  • MB-OFDM
  • Pulsed-OFDM
  • Transceiver

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