FPGA-Based Data Processing using High-Level Synthesis on the Antarctic Demonstrator for the Advanced Particle-astrophysics Telescope (ADAPT)

FPGAs are widely deployed on high-energy astrophysics telescopes to read out sensor data from front-end electronics. To support continuous data streams or high trigger rates, FPGA logic may be employed to process raw sensor readout values, reducing the volume of data transmitted, processed, and stored by downstream CPU-based computational platforms. Across instruments, these FPGA-based processing pipelines often have similar semantics and share common stages. However, diverse telescope designs require unique implementations of the constituent algorithms, and the logic is often rewritten from scratch for a new instrument. Writing, simulating, and debugging firmware is difficult and time consuming. However, High-Level Synthesis (HLS) allows these algorithms to be implemented in a high-level language, enabling fast prototyping and deployment. Nonetheless, writing performant HLS code is not straightforward, and requires an understanding of how the synthesis tools convert high-level language constructs, compiler-specific pragmas, and vendor-provided template libraries to hardware circuits. This work presents an initial HLS library of common algorithms for deployment in particle astrophysics detectors. We apply it to the Antarctic Demonstrator for the Advanced Particle-astrophysics Telescope (ADAPT), an MeV–TeV gamma-ray instrument that combines a pair tracker and Compton telescope anticipated to fly on a high-altitude balloon during the 2026–27 Antarctic season. Our library enables efficient processing of digitized waveform data from ADAPT’s >2000 sensor readout channels, including per-channel photon counting and cross-channel centroiding. Our library can process hundreds of thousands of event triggers per second when deployed on embedded FPGAs flying aboard the ADAPT instrument, while providing flexibility and extensibility.