TY - GEN
T1 - FPGA-based CDMA switch for networks-on-chip
AU - Kim, Daewook
AU - Kim, Manho
AU - Sobelman, Gerald E.
N1 - Copyright:
Copyright 2008 Elsevier B.V., All rights reserved.
PY - 2005
Y1 - 2005
N2 - This paper presents timing and area results for an FPGA implementation of a CDMA-based switch for networks-on-chip. The design was mapped onto the Xilinx Virtex4 XC4VLX200 device using Synplify Pro for a range of payload sizes. The synthesis results give the area and maximum frequency obtained. Simulation verifies the desired functionality and provides throughput and latency values as functions of payload size.
AB - This paper presents timing and area results for an FPGA implementation of a CDMA-based switch for networks-on-chip. The design was mapped onto the Xilinx Virtex4 XC4VLX200 device using Synplify Pro for a range of payload sizes. The synthesis results give the area and maximum frequency obtained. Simulation verifies the desired functionality and provides throughput and latency values as functions of payload size.
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U2 - 10.1109/FCCM.2005.37
DO - 10.1109/FCCM.2005.37
M3 - Conference contribution
AN - SCOPUS:33746161610
SN - 0769524451
SN - 9780769524450
T3 - Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005
SP - 283
EP - 284
BT - Proceedings - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005
T2 - 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM 2005
Y2 - 18 April 2005 through 20 April 2005
ER -