Turbo decoders inherently require large hardware for VLSI implementation as a large amount of memory is required to store incoming data and intermediate computation results. Design of highly efficient Turbo decoders requires reduction of hardware size and power consumption. In this paper, finite precision effects on the performance of Turbo decoders are analyzed and the optimal word lengths of variables are determined considering tradeoffs between the performance and the hardware cost. It is shown that the performance degradation from the infinite precision is negligible if 4 bits are used for received bits and 6 bits for the extrinsic information. The state metrics normalization method suitable for Turbo decoders is also discussed. This method requires small amount of hardware and its speed does not depend on the number of states. Furthermore, we propose a novel adaptive decoding approach which does not lead to performance degradation and is suitable for VLSI implementation.
|Original language||English (US)|
|Number of pages||13|
|Journal||Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology|
|State||Published - 2001|
Bibliographical noteFunding Information:
∗This research was supported by Defense Advanced Research Project Agency under contract number DA/DABT63-96-C-0050. †Present address: Morphics Technology, Inc., 675 Campbell Tech. PKWY, Ste 100, Campbell CA 95008, USA.
- Adaptive decoding
- MAP algorithm
- Turbo codes
- VLSI implementation