TY - GEN
T1 - FDSOI CMOS with dual backgate control for performance and power modulation
AU - Yau, Jeng Bang
AU - Cai, Jin
AU - Shi, Leathen
AU - Dennard, Robert H.
AU - Kumar, Arvind
AU - Saenger, Katherine L.
AU - Reznicek, Alexander
AU - Solomon, Paul M.
AU - Ouyang, Qiqing
AU - Koester, Steven
AU - Haensch, Wilfried E.
PY - 2009/12/1
Y1 - 2009/12/1
N2 - We demonstrate, for the first time, modulation of power-performance of a ring oscillator fabricated on thin-BOX (buried oxide) FD (fully-depleted) SOI using independent backgate controls for nFET and pFET. The thin BOX facilities an effective modulation of ring characteristics with small (1-2V) independent backgate voltages. Leakage current per stage can be reduced by more than 100x with 30% increase of inverter delay. In addition the inverter delay can be improved by 15% with 2x increase of the stand-by current. Compatible with conventional CMOS process, our results suggest the backgate technology, an additional knob for power/performance optimization and variability control, is attractive for continued CMOS scaling.
AB - We demonstrate, for the first time, modulation of power-performance of a ring oscillator fabricated on thin-BOX (buried oxide) FD (fully-depleted) SOI using independent backgate controls for nFET and pFET. The thin BOX facilities an effective modulation of ring characteristics with small (1-2V) independent backgate voltages. Leakage current per stage can be reduced by more than 100x with 30% increase of inverter delay. In addition the inverter delay can be improved by 15% with 2x increase of the stand-by current. Compatible with conventional CMOS process, our results suggest the backgate technology, an additional knob for power/performance optimization and variability control, is attractive for continued CMOS scaling.
UR - https://www.scopus.com/pages/publications/77950169943
UR - https://www.scopus.com/pages/publications/77950169943#tab=citedBy
U2 - 10.1109/VTSA.2009.5159302
DO - 10.1109/VTSA.2009.5159302
M3 - Conference contribution
AN - SCOPUS:77950169943
SN - 9781424427857
T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings
SP - 84
EP - 85
BT - 2009 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA '09
T2 - 2009 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA '09
Y2 - 27 April 2009 through 29 April 2009
ER -