@inproceedings{6fda91ac79514747bfa553be36260a09,
title = "Fast disjoint transistor networks from BDDs",
abstract = "In this paper, we describe different ways to derive transistor networks from BDDs. The use of disjoint pull-up (composed of PMOS transistors) and pull-down (composed of NMOS transistors) planes allows simplifications that result in shorter pull-up and pull-down transistor stacks. The reduced length of transistor stacks leads to the fastest implementation among the six different strategies evaluated to generate transistor networks from BDDs. Delay and area results are presented showing the impact of the proposed strategy.",
keywords = "BDDs, CMOS gates, PTL, Switch theory, Unateness",
author = "{Da Rosa}, {Leomar S.} and Marques, {Felipe S.} and Cardoso, {Tiago M.G.} and Ribas, {Renato P.} and Sapatnekar, {Sachin S.} and Reis, {Andr{\'e} I.}",
year = "2006",
month = nov,
day = "16",
language = "English (US)",
isbn = "1595934790",
series = "SBCCI 2006 - 19th Symposium on Integrated Circuits and Systems Design",
pages = "137--142",
booktitle = "Proceedings SBCCI 2006 - 19th Symposium on Integrated Circuits and Systems Design",
note = "SBCCI 2006 - 19th Symposium on Integrated Circuits and Systems Design ; Conference date: 28-08-2006 Through 01-09-2006",
}