TY - JOUR
T1 - Exploring the Feasibility of Using 3-D XPoint as an In-Memory Computing Accelerator
AU - Zabihi, Masoud
AU - Resch, Salonik
AU - Cilasun, Husrev
AU - Chowdhury, Zamshed I.
AU - Zhao, Zhengyang
AU - Karpuzcu, Ulya R.
AU - Wang, Jian Ping
AU - Sapatnekar, Sachin S.
N1 - Funding Information:
This work was supported in part by the National Science Foundation (NSF) under Award CCF-1725420 and Award CCF-1763761.
Publisher Copyright:
© 2014 IEEE.
PY - 2021/1/1
Y1 - 2021/1/1
N2 - This article describes how 3-D XPoint memory arrays can be used as in-memory computing accelerators. We first show that thresholded matrix-vector multiplication (TMVM), the fundamental computational kernel in many applications including machine learning (ML), can be implemented within a 3-D XPoint array without requiring data to leave the array for processing. Using the implementation of TMVM, we then discuss the implementation of a binary neural inference engine. We discuss the application of the core concept to address issues such as system scalability, where we connect multiple 3-D XPoint arrays, and power integrity, where we analyze the parasitic effects of metal lines on noise margins. To assure power integrity within the 3-D XPoint array during this implementation, we carefully analyze the parasitic effects of metal lines on the accuracy of the implementations. We quantify the impact of parasitics on limiting the size and configuration of a 3-D XPoint array, and estimate the maximum acceptable size of a 3-D XPoint subarray.
AB - This article describes how 3-D XPoint memory arrays can be used as in-memory computing accelerators. We first show that thresholded matrix-vector multiplication (TMVM), the fundamental computational kernel in many applications including machine learning (ML), can be implemented within a 3-D XPoint array without requiring data to leave the array for processing. Using the implementation of TMVM, we then discuss the implementation of a binary neural inference engine. We discuss the application of the core concept to address issues such as system scalability, where we connect multiple 3-D XPoint arrays, and power integrity, where we analyze the parasitic effects of metal lines on noise margins. To assure power integrity within the 3-D XPoint array during this implementation, we carefully analyze the parasitic effects of metal lines on the accuracy of the implementations. We quantify the impact of parasitics on limiting the size and configuration of a 3-D XPoint array, and estimate the maximum acceptable size of a 3-D XPoint subarray.
KW - 3-D XPoint
KW - in-memory computing
KW - matrix-vector multiplication
KW - neural network
KW - phase-change memory (PCM)
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U2 - 10.1109/JXCDC.2021.3112238
DO - 10.1109/JXCDC.2021.3112238
M3 - Article
AN - SCOPUS:85115125381
SN - 2329-9231
VL - 7
SP - 88
EP - 96
JO - IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
JF - IEEE Journal on Exploratory Solid-State Computational Devices and Circuits
IS - 2
ER -