@inproceedings{5225680348ca41649dae4282dfbcdfaa,
title = "Exploring potential benefits of 3D FPGA integration",
abstract = "A new timing-driven partitioning-based placement tool for 3D FPGA integration is presented. The circuit is first divided into layers with limited number of inter-layer vias, and then placement is performed on individual layers, while minimizing the delay of critical paths. We use our tool as a platform for exploring potential benefits in terms of delay and wire-length that 3D technologies can offer for FPGA fabrics. We show that 3D integration results in wire-length reduction for FPGA designs. Our empirical analysis shows that wire-length can be reduced by up to 50% using ten layers. Delay reductions are estimated to be more than 30% if multi-segment lengths are employed between layers.",
author = "Cristinel Ababei and Pongstorn Maidee and Kia Bazargan",
note = "Publisher Copyright: {\textcopyright} Springer-Verlag Berlin Heidelberg 2004. Copyright: Copyright 2020 Elsevier B.V., All rights reserved.; 14th International Conference on Field Programmable Logic and Applications, FPL 2004 ; Conference date: 30-08-2004 Through 01-09-2004",
year = "2004",
doi = "10.1007/978-3-540-30117-2_92",
language = "English (US)",
isbn = "3540229892",
series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
publisher = "Springer Verlag",
pages = "874--880",
editor = "Jurgen Becker and Marco Platzner and Serge Vernalde",
booktitle = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",
}