Exploiting 2.5D/3D Heterogeneous Integration for AI Computing

Zhenyu Wang; Jingbo Sun; Alper Goksoy; Sumit K. Mandal; Yaotian Liu; Jae Sun Seo; Chaitali Chakrabarti; Umit Y. Ogras; Vidya Chhabria; Jeff Zhang; Yu Cao

Exploiting 2.5D/3D Heterogeneous Integration for AI Computing

Zhenyu Wang, Jingbo Sun, Alper Goksoy, Sumit K. Mandal, Yaotian Liu, Jae Sun Seo, Chaitali Chakrabarti, Umit Y. Ogras, Vidya Chhabria, Jeff Zhang, Yu Cao

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Scopus citations

Abstract

The evolution of AI algorithms has not only revolutionized many application domains, but also posed tremendous challenges on the hardware platform. Advanced packaging technology today, such as 2.5D and 3D interconnection, provides a promising solution to meet the ever-increasing demands of bandwidth, data movement, and system scale in AI computing. This work presents HISIM, a modeling and benchmarking tool for chiplet-based heterogeneous integration. HISIM emphasizes the hierarchical interconnection that connects various chiplets through network-on-package. It further integrates technology roadmap, power/latency prediction, and thermal analysis together to support electro-thermal co-design. Leveraging HISIM with in-memory computing chiplets, we explore the advantages and limitations of 2.5D and 3D heterogenous integration on representative AI algorithms, such as DNNs, transformers, and graph neural networks.

Original language	English (US)
Title of host publication	ASP-DAC 2024 - 29th Asia and South Pacific Design Automation Conference, Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	758-764
Number of pages	7
ISBN (Electronic)	9798350393545
State	Published - 2024
Event	29th Asia and South Pacific Design Automation Conference, ASP-DAC 2024 - Incheon, Korea, Republic of Duration: Jan 22 2024 → Jan 25 2024

Publication series

Name	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Conference

Conference	29th Asia and South Pacific Design Automation Conference, ASP-DAC 2024
Country/Territory	Korea, Republic of
City	Incheon
Period	1/22/24 → 1/25/24

Bibliographical note

Publisher Copyright:
© 2024 IEEE.

Keywords

2.5D
3D
Chiplet
Heterogeneous Integration
ML accelerators
Performance Analysis

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Wang, Z., Sun, J., Goksoy, A., Mandal, S. K., Liu, Y., Seo, J. S., Chakrabarti, C., Ogras, U. Y., Chhabria, V., Zhang, J., & Cao, Y. (2024). Exploiting 2.5D/3D Heterogeneous Integration for AI Computing. In ASP-DAC 2024 - 29th Asia and South Pacific Design Automation Conference, Proceedings (pp. 758-764). (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC). Institute of Electrical and Electronics Engineers Inc..

Exploiting 2.5D/3D Heterogeneous Integration for AI Computing. / Wang, Zhenyu; Sun, Jingbo; Goksoy, Alper et al.
ASP-DAC 2024 - 29th Asia and South Pacific Design Automation Conference, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2024. p. 758-764 (Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Wang, Z, Sun, J, Goksoy, A, Mandal, SK, Liu, Y, Seo, JS, Chakrabarti, C, Ogras, UY, Chhabria, V, Zhang, J & Cao, Y 2024, Exploiting 2.5D/3D Heterogeneous Integration for AI Computing. in ASP-DAC 2024 - 29th Asia and South Pacific Design Automation Conference, Proceedings. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, Institute of Electrical and Electronics Engineers Inc., pp. 758-764, 29th Asia and South Pacific Design Automation Conference, ASP-DAC 2024, Incheon, Korea, Republic of, 1/22/24.

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AU - Liu, Yaotian

AU - Seo, Jae Sun

AU - Chakrabarti, Chaitali

AU - Ogras, Umit Y.

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AB - The evolution of AI algorithms has not only revolutionized many application domains, but also posed tremendous challenges on the hardware platform. Advanced packaging technology today, such as 2.5D and 3D interconnection, provides a promising solution to meet the ever-increasing demands of bandwidth, data movement, and system scale in AI computing. This work presents HISIM, a modeling and benchmarking tool for chiplet-based heterogeneous integration. HISIM emphasizes the hierarchical interconnection that connects various chiplets through network-on-package. It further integrates technology roadmap, power/latency prediction, and thermal analysis together to support electro-thermal co-design. Leveraging HISIM with in-memory computing chiplets, we explore the advantages and limitations of 2.5D and 3D heterogenous integration on representative AI algorithms, such as DNNs, transformers, and graph neural networks.

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ER -

Exploiting 2.5D/3D Heterogeneous Integration for AI Computing

Abstract

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Keywords

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