Enhanced analytic noise model for RF CMOS design

Jim Koeppe, Ramesh Harjani

Research output: Contribution to journalConference article

3 Scopus citations

Abstract

In this paper we develop a simple physics based noise model for short channel RF CMOS devices that is targeted towards analytic hand calculations but is easily incorporated into a circuit simulator. Classical CMOS transistor noise theory set forth by A. Van der Zeil is combined with more recent noise studies. A novel de-embedding technique is used to extract experimental noise parameter results that confirm the model's accuracy from 2-20 GHz for 0.18μ length devices in the TSMC CMOS process. While some authors have assumed a fixed excess noise factor (γ) for predicting RF noise at a particular channel length, we show here that γ is sensitive to both device bias and process parameters and cannot be assumed constant for fixed channel length.

Original languageEnglish (US)
Pages (from-to)383-386
Number of pages4
JournalProceedings of the Custom Integrated Circuits Conference
StatePublished - Dec 1 2004
EventProceedings of the IEEE 2004 Custom Integrated Circuits Conference, CICC - Orlando, FL, United States
Duration: Oct 3 2004Oct 6 2004

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