Elliptic curve scalar multiplier design using FPGAs

Lijun Gao; Sarvesh Shrivastava; Gerald E Sobelman

doi:10.1007/3-540-48059-5_22

Elliptic curve scalar multiplier design using FPGAs

Lijun Gao, Sarvesh Shrivastava, Gerald E Sobelman

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

21 Scopus citations

Abstract

A compact fast elliptic curve scalar multiplier with variable key size is implemented as a coprocessor with a Xilinx FPGA. This implementation utilizes the internal SRAM/registers of the FPGA and has the whole scalar multiplier implemented within a single FPGA chip. The compact design helps reduce the overhead and limitations associated with data transfer between FPGA and host, and thus leads to high performance. The experimental data from the mappings over small fields shows that the carefully constructed hardware architecture is regular and has high CLB utilization.

Original language	English (US)
Title of host publication	Cryptographic Hardware and Embedded Systems - 1st International Workshop, CHES 1999, Proceedings
Editors	Cetin K. Koc, Paar Paar
Publisher	Springer Verlag
Pages	257-268
Number of pages	12
ISBN (Print)	354066646X, 9783540666462
DOIs	https://doi.org/10.1007/3-540-48059-5_22
State	Published - 1999
Event	1st Workshop on Cryptographic Hardware and Embedded Systems, CHES 1999 - Worcester, United States Duration: Aug 12 1999 → Aug 13 1999

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	1717
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Other

Other	1st Workshop on Cryptographic Hardware and Embedded Systems, CHES 1999
Country/Territory	United States
City	Worcester
Period	8/12/99 → 8/13/99

Bibliographical note

Publisher Copyright:
© Springer-Verlag Berlin Heidelberg 1999.

Keywords

Coprocessor
Elliptic curves
FPGA
Galois field
Public-key cryptography
Reconfigurable hardware
Scalar multiplication

Publisher link

10.1007/3-540-48059-5_22

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Gao, L., Shrivastava, S., & Sobelman, G. E. (1999). Elliptic curve scalar multiplier design using FPGAs. In C. K. Koc, & P. Paar (Eds.), Cryptographic Hardware and Embedded Systems - 1st International Workshop, CHES 1999, Proceedings (pp. 257-268). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 1717). Springer Verlag. https://doi.org/10.1007/3-540-48059-5_22

Elliptic curve scalar multiplier design using FPGAs. / Gao, Lijun; Shrivastava, Sarvesh; Sobelman, Gerald E.
Cryptographic Hardware and Embedded Systems - 1st International Workshop, CHES 1999, Proceedings. ed. / Cetin K. Koc; Paar Paar. Springer Verlag, 1999. p. 257-268 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 1717).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Gao, L, Shrivastava, S & Sobelman, GE 1999, Elliptic curve scalar multiplier design using FPGAs. in CK Koc & P Paar (eds), Cryptographic Hardware and Embedded Systems - 1st International Workshop, CHES 1999, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 1717, Springer Verlag, pp. 257-268, 1st Workshop on Cryptographic Hardware and Embedded Systems, CHES 1999, Worcester, United States, 8/12/99. https://doi.org/10.1007/3-540-48059-5_22

Gao L, Shrivastava S, Sobelman GE. Elliptic curve scalar multiplier design using FPGAs. In Koc CK, Paar P, editors, Cryptographic Hardware and Embedded Systems - 1st International Workshop, CHES 1999, Proceedings. Springer Verlag. 1999. p. 257-268. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/3-540-48059-5_22

Gao, Lijun ; Shrivastava, Sarvesh ; Sobelman, Gerald E. / Elliptic curve scalar multiplier design using FPGAs. Cryptographic Hardware and Embedded Systems - 1st International Workshop, CHES 1999, Proceedings. editor / Cetin K. Koc ; Paar Paar. Springer Verlag, 1999. pp. 257-268 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

@inproceedings{0fb097402b4a4f4f9cad937e088092b5,

title = "Elliptic curve scalar multiplier design using FPGAs",

abstract = "A compact fast elliptic curve scalar multiplier with variable key size is implemented as a coprocessor with a Xilinx FPGA. This implementation utilizes the internal SRAM/registers of the FPGA and has the whole scalar multiplier implemented within a single FPGA chip. The compact design helps reduce the overhead and limitations associated with data transfer between FPGA and host, and thus leads to high performance. The experimental data from the mappings over small fields shows that the carefully constructed hardware architecture is regular and has high CLB utilization.",

keywords = "Coprocessor, Elliptic curves, FPGA, Galois field, Public-key cryptography, Reconfigurable hardware, Scalar multiplication",

author = "Lijun Gao and Sarvesh Shrivastava and Sobelman, {Gerald E}",

note = "Publisher Copyright: {\textcopyright} Springer-Verlag Berlin Heidelberg 1999.; 1st Workshop on Cryptographic Hardware and Embedded Systems, CHES 1999 ; Conference date: 12-08-1999 Through 13-08-1999",

year = "1999",

doi = "10.1007/3-540-48059-5_22",

language = "English (US)",

isbn = "354066646X",

series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

publisher = "Springer Verlag",

pages = "257--268",

editor = "Koc, {Cetin K.} and Paar Paar",

booktitle = "Cryptographic Hardware and Embedded Systems - 1st International Workshop, CHES 1999, Proceedings",

}

TY - GEN

T1 - Elliptic curve scalar multiplier design using FPGAs

AU - Gao, Lijun

AU - Shrivastava, Sarvesh

AU - Sobelman, Gerald E

N1 - Publisher Copyright: © Springer-Verlag Berlin Heidelberg 1999.

PY - 1999

Y1 - 1999

N2 - A compact fast elliptic curve scalar multiplier with variable key size is implemented as a coprocessor with a Xilinx FPGA. This implementation utilizes the internal SRAM/registers of the FPGA and has the whole scalar multiplier implemented within a single FPGA chip. The compact design helps reduce the overhead and limitations associated with data transfer between FPGA and host, and thus leads to high performance. The experimental data from the mappings over small fields shows that the carefully constructed hardware architecture is regular and has high CLB utilization.

AB - A compact fast elliptic curve scalar multiplier with variable key size is implemented as a coprocessor with a Xilinx FPGA. This implementation utilizes the internal SRAM/registers of the FPGA and has the whole scalar multiplier implemented within a single FPGA chip. The compact design helps reduce the overhead and limitations associated with data transfer between FPGA and host, and thus leads to high performance. The experimental data from the mappings over small fields shows that the carefully constructed hardware architecture is regular and has high CLB utilization.

KW - Coprocessor

KW - Elliptic curves

KW - FPGA

KW - Galois field

KW - Public-key cryptography

KW - Reconfigurable hardware

KW - Scalar multiplication

UR - http://www.scopus.com/inward/record.url?scp=22844454852&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=22844454852&partnerID=8YFLogxK

U2 - 10.1007/3-540-48059-5_22

DO - 10.1007/3-540-48059-5_22

M3 - Conference contribution

AN - SCOPUS:22844454852

SN - 354066646X

SN - 9783540666462

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 257

EP - 268

BT - Cryptographic Hardware and Embedded Systems - 1st International Workshop, CHES 1999, Proceedings

A2 - Koc, Cetin K.

A2 - Paar, Paar

PB - Springer Verlag

T2 - 1st Workshop on Cryptographic Hardware and Embedded Systems, CHES 1999

Y2 - 12 August 1999 through 13 August 1999

ER -

Elliptic curve scalar multiplier design using FPGAs

Abstract

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