Abstract
N-and p-MOSFETs have been fabricated in strained Si-on-SiGe-on-insulator (SSOI) with high (15-25%) Ge content. Wafer bonding and H-induced layer transfer techniques enabled the fabrication of the high Ge content SiGe-on-insulator (SGOI) substrates. Mobility enhancement of 50% for electrons (with 15% Ge) and 15-20% for holes (with 20-25% Ge) has been demonstrated in SSOI MOSFETs. These mobility enhancements are commensurate with those reported for FETs fabricated on strained silicon on bulk SiGe substrates.
Original language | English (US) |
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Pages (from-to) | 1566-1571 |
Number of pages | 6 |
Journal | IEEE Transactions on Electron Devices |
Volume | 49 |
Issue number | 9 |
DOIs | |
State | Published - Sep 2002 |
Keywords
- CMOS
- Mobility
- SiGe
- Silicon-on-insulator (SOI)
- Strained silicon
- Wafer bending