A recently proposed methodology for electromigration (EM) assessment in on-chip power/ground grid of integrated circuits has been validated by means of measurements, performed on dedicated test grids. IR drop degradation in the grid is used for defining the EM failure criteria. Physics-based models are involved for simulation of EM-induced stress evolution in interconnect structures, void formation and evolution, resistance increase of the voided segments, and consequent re-distribution of electric current in the redundant grid paths. A grid-like test structure, fabricated with a 65 nm technology and consisting of two metal layers, allowed to calibrate the voiding models by tracking voltage evolution in all grid nodes in experiment and in simulation. Good fit of the measured and simulated time-To-failure (TTF) probability distribution was obtained in both cases of uniform and non-uniform temperature distribution across the grid. The second test grid was fabricated with a 28 nm technology, consisted of 4 metal layers, and contained power and ground nets connected to "quasi-cells"with poly-resistors, which were specially designed for operating at elevated temperatures ∼350°C. The existing current distributions resulted in different behavior of EM-induced failures in these nets: A gradual voltage evolution in power net, and sharp changes in ground net were observed in experiment, and successfully reproduced in simulations.
|Original language||English (US)|
|Title of host publication||ISPD 2023 - Proceedings of the 2023 International Symposium on Physical Design|
|Publisher||Association for Computing Machinery|
|Number of pages||9|
|State||Published - Mar 26 2023|
|Event||32nd ACM International Symposium on Physical Design, ISPD 2023 - Virtual, Online, United States|
Duration: Mar 26 2023 → Mar 29 2023
|Name||Proceedings of the International Symposium on Physical Design|
|Conference||32nd ACM International Symposium on Physical Design, ISPD 2023|
|Period||3/26/23 → 3/29/23|
Bibliographical noteFunding Information:
This work was supported in part by the French National Research Agency (ANR) under the “Investissements d’avenir” programs: ANR 10-AIRT-0005 (IRT NANO-ELEC) (S. Moreau) and in part by Semiconductor Research Corporation (Y. Yi and C.H. Kim).
© 2023 Owner/Author.
- Failure analysis
- Power grids
- Reliability theory