In many modern technologies, shallow trench isolation (STI) exhibits a potential application, especially for power devices or SOI ones. During its application, technologies have found the mechanical stress which originated from STI technology. This paper describes the usage of STI on power devices, which fulfills 700V technology on 100V BCD technology. Main results are the mobility variations with stress, the strong effect of Rsd on transistors. Then using the same approach on short devices with different distances gate edge to STI, we show how to evaluate stress distribution induced by STI as well as its mean value under the gate of the devices. These results help to understand, minimize or optimize stress effects.