Practical approaches for on-chip inductance extraction to obtain a sparse, stable and accurate inverse inductance matrix K are proposed. The novelty of our work is in using circuit characteristics to define the concept of resistance-dominant and inductance-dominant lines. This notion is used to progressively refine a set of clusters that are inductively tightly-coupled. For reasonable designs, the more exact Algorithm 1 yields a sparsification of 97% for delay and oscillation magnitude errors of 10% and 15%, respectively, while the more approximate Algorithm 2 achieves up to 99% sparsification. An offshoot of this work is K-PRIMA, an extension of PRIMA to handle K matrices with guaranteed passivity.
|Original language||English (US)|
|Number of pages||6|
|State||Published - Jan 1 2002|
|Event||International Conference on Computer Design (ICCD'02) VLSI in Copmuters and Processors - Freiburg, Germany|
Duration: Sep 16 2002 → Sep 18 2002
|Other||International Conference on Computer Design (ICCD'02) VLSI in Copmuters and Processors|
|Period||9/16/02 → 9/18/02|