Effect of uniaxial strain on the drain current of a heterojunction tunneling field-effect transistor

Paul M. Solomon, I. Lauer, A. Majumdar, J. T. Teherani, M. Luisier, J. Cai, S. J. Koester

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Abstract

The electrical characteristics of a heterojunction tunneling field-effect transistor (HETT), with a p-type Si0.75Ge0.25 source, have been measured as a function of strain. HETTs with channel transport and applied strain both in the [110] direction show a smooth monotonic change in drain current over a range of 0.09% compressive to 0.13% tensile strain. A measure γ = (d/d ln JD)(d ln JD/ds) s = 0 of the effect of strain s on tunneling current JD is proposed, which captures the dependence of the tunneling exponential argument on strain. An experimental value of γ = - 11.7 is extracted for the tensile case and compared to simulation results. We found theoretically that the value and sign of γ depend sensitively on the built-in strain at the SiSiGe interface.

Original languageEnglish (US)
Article number5723690
Pages (from-to)464-466
Number of pages3
JournalIEEE Electron Device Letters
Volume32
Issue number4
DOIs
StatePublished - Apr 2011

Bibliographical note

Funding Information:
Manuscript received December 13, 2010; accepted January 15, 2011. Date of publication March 3, 2011; date of current version March 23, 2011. This work was supported by Defense Advanced Research Projects Agency under Air Force Research Laboratory Contract FA8650-08-C-7806. The review of this letter was arranged by Editor B.-G. Park. P. M. Solomon, I. Lauer, A. Majumdar, and J. Cai are with the IBM T. J. Research Center, Yorktown Heights, NY 10598 USA (e-mail: solomonp@us. ibm.com; [email protected]; [email protected]; [email protected]). J. T. Teherani is with the Massachusetts Institute of Technology, Cambridge, MA 02139-4307 USA (e-mail: [email protected]). M. Luisier is with Purdue University, West Lafayette, IN 47907 USA (e-mail: [email protected]). S. J. Koester is with the University of Minnesota, Minneapolis, MN 55455 USA (e-mail: [email protected]). Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LED.2011.2108993 Fig. 1. Schematic cross section near the tunneling source region of HETT device, with carrier generation regions superimposed. (1) p+ (shaded) doped and (2) undoped Si0.75Ge0.25 sources, (3) undoped Si channel, (4) polysilicon gate, (5) HfO2 and (6) SiO2 gate insulator layers, and (6a) SiO2 layer in gate-overhung region, in place for SiGe growth. The band-to-band generation rate (in cm−3/s) is superimposed on the device cross section. The arrows show the crystal direction.

Keywords

  • Band-to-band tunneling
  • strain
  • stress
  • tunneling FET (TFET)

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