Dynamic Energy Optimization in Chip Multiprocessors Using Deep Neural Networks

Keyphrases

• Deep Neural Network 100%
• Chip multiprocessor 100%
• Dynamic Power Optimization 100%
• Training Data 40%
• Kalman Filter 40%
• Performance Degradation 40%
• Voltage Frequency 40%
• Core Architectures 40%
• Energy Optimization 20%
• Energy Reduction 20%
• Dynamic Voltage Scaling 20%
• Reinforcement Learning 20%
• Dynamic Voltage Frequency Scaling 20%
• Low Power Consumption 20%
• Heuristic Algorithms 20%
• Acceptable Thresholds 20%
• Power Delay Product 20%
• Training Process 20%
• Network on chip 20%
• Threshold Setting 20%
• Workload Characteristics 20%
• Load Forecasting 20%
• Chip-based 20%
• Multi-processor System-on-chip (MPSoC) 20%
• Core Network 20%
• Performance Constraints 20%
• Optimal Voltage Vector 20%
• Dynamic Energy Management 20%
• Efficient Heuristics 20%
• Neural Network Method 20%
• Energy Management Algorithm 20%

Computer Science

• Deep Neural Network 100%
• Chip Multiprocessor 100%
• Energy Optimization 100%
• Neural Network Model 60%
• Core Architecture 40%
• Frequency-Voltage Pair 40%
• Performance Degradation 40%
• Reinforcement Learning 20%
• Dynamic Voltage and Frequency Scaling 20%
• Multiprocessor System 20%
• Neural Network Approach 20%
• Networks on Chips 20%
• Workload Characteristic 20%
• Energy Delay Product 20%
• Heuristic-Based Algorithm 20%
• Lower Energy Consumption 20%
• Training Process 20%
• Training Data 20%
• Training Data Point 20%