Dual-gate pentacene organic field-effect transistors based on a nanoassembled SiO 2 nanoparticle thin film as the gate dielectric layer

Tianhong Cui, Guirong Liang

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Abstract

In this paper, we report the fabrication of dual-gate organic field-effect transistors (OFETs) using self-assembled SiO 2 and thermal oxide as gate dielectric materials and pentacene as a semiconductor. The top dielectric layer was formed by the low-cost and Jow-temperature self-assembly with SiO 2 nanoparticles 45 nm in diameter. The fabricated dual-gate pentacene field-effect transistor (FET) has a threshold voltage of -2.2 V, a field-effect mobility of 0.1 cm 2/V s, an I on/off ratio of 3.8 × 10 3, and a slope of 1.3 V/decade. Compared to a single gate OFET, dual-gate FET has better performance with higher drain output current at the relatively low operating voltage, larger field-effect mobility, and better channel controllability by separately adjusting two gate biases.

Original languageEnglish (US)
Article number064102
Pages (from-to)1-3
Number of pages3
JournalApplied Physics Letters
Volume86
Issue number6
DOIs
StatePublished - Feb 7 2005

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