TY - GEN
T1 - Dual cycle shift data-weighted averaging technique for multi-bit sigma-delta modulators
AU - Ma, Xiaofen
AU - Xu, Jian
AU - Wu, Xiaobo
PY - 2009
Y1 - 2009
N2 - Data weighted averaging (DWA) is the most popular Dynamic Element Matching (DEM) technique to reduce the effects of DAC nonlinearity in multi-bit Sigma-Delta Modulators (MBSDM). However, due to the non-symmetry of the unit-elements in multi-bit DAC, in-band signal-dependent tones always appear when a low oversampling ratio (OSR) is employed in traditional DWA. Therefore, a novel DEM technique, dual cycle shift DWA(DCSDWA), is proposed to deal with the tone problem in this paper. Compared with other modified DWAtechniques, DCSDWAis a more effective one with simple implementation. Using the proposed technique in a 4th-order MBSDM with an OSR of 32, the maximum in-band tone is reduced to 6 dB when a random DAC-element mismatching error of 0.5% is assumed. In addition, it results in a better linearity of signal-to-noise distortion ratio (SNDR) versus different input signal and a wider dynamic range (DR). The simulation results prove that the proposed DCSDWA is suitable for low OSR applications (OSR≥8) with a good performance.
AB - Data weighted averaging (DWA) is the most popular Dynamic Element Matching (DEM) technique to reduce the effects of DAC nonlinearity in multi-bit Sigma-Delta Modulators (MBSDM). However, due to the non-symmetry of the unit-elements in multi-bit DAC, in-band signal-dependent tones always appear when a low oversampling ratio (OSR) is employed in traditional DWA. Therefore, a novel DEM technique, dual cycle shift DWA(DCSDWA), is proposed to deal with the tone problem in this paper. Compared with other modified DWAtechniques, DCSDWAis a more effective one with simple implementation. Using the proposed technique in a 4th-order MBSDM with an OSR of 32, the maximum in-band tone is reduced to 6 dB when a random DAC-element mismatching error of 0.5% is assumed. In addition, it results in a better linearity of signal-to-noise distortion ratio (SNDR) versus different input signal and a wider dynamic range (DR). The simulation results prove that the proposed DCSDWA is suitable for low OSR applications (OSR≥8) with a good performance.
KW - DAC nonlinearity
KW - Dual cycle shift DWA
KW - Multi-bit sigma-delta modulators
UR - http://www.scopus.com/inward/record.url?scp=77949580349&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77949580349&partnerID=8YFLogxK
U2 - 10.1109/EDSSC.2009.5394163
DO - 10.1109/EDSSC.2009.5394163
M3 - Conference contribution
AN - SCOPUS:77949580349
SN - 9781424442980
T3 - 2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009
SP - 174
EP - 177
BT - 2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009
T2 - 2009 IEEE International Conference on Electron Devices and Solid-State Circuits, EDSSC 2009
Y2 - 25 December 2009 through 27 December 2009
ER -