We present experimental data showing that the dependence of the gate current on the drain voltage in enhancement-mode heterostructure field-effect transistors changes qualitatively when the gate voltage is varied from below to above threshold. The data lead to the conclusion that, for gate voltages higher than the threshold voltage and drain voltages larger than the drain saturation voltage, most of the potential drop occurs in a small region near the drain end of the channel. The gate current is distributed along the channel so that electrons in the channel are diverted toward the gate. We propose a model that takes into account such a distribution of the gate current along the channel. The distributive nature of the gate current leads to negative transconductance in heterostructure field-effect transistors at high gate voltages. We observe negative transconductances reaching —125 mS/mm in 1-pm gate devices and propose an equivalent circuit model that describes the dependence of the drain current on the gate voltage in good agreement with our experimental data.