A monolithic pixel detector with 0.2μm silicon-on-insulator (SOI) CMOS technology has been developed. It has both a thick high-resistivity sensor layer and thin LSI circuit layer on a single chip. Integration-type and counting-type pixel detectors are fabricated and tested with light and X-rays. The process is open to many researchers through Multi Project Wafer (MPW) runs operated by KEK. Further improvements of the fabrication technologies are also under investigation by using a buried p-well and 3D integration technologies.
|Original language||English (US)|
|Number of pages||3|
|Journal||Nuclear Instruments and Methods in Physics Research, Section A: Accelerators, Spectrometers, Detectors and Associated Equipment|
|State||Published - Nov 1 2010|
Bibliographical noteFunding Information:
The authors wish to thank F. Takasaki and J. Haba for their continuing support to this project. This work is supported by VLSI Design and Education Center (VDEC), The University of Tokyo with the collaboration of the Cadence Corporation and Mentor Graphics Corporation.
- Particle tracking
- X-ray imaging