Development of static random access memories using complementary heterostructure insulated gate field effect transistor technology

D. E. Grider, A. I. Akinwande, R. Mactaggart, P. P. Ruden, J. C. Nohava, T. E. Nohava, J. E. Breezley, P. Joslyn, D. Tetzlaff

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Scopus citations

Abstract

A complementary heterostructure insulated gate field effect transistor (C-HIGFET) technology has been developed which is capable of operating at high speeds with very low static power dissipation. Ring oscillator circuits fabricated using this 1-μm gate length C-HIGFET technology exhibited very low power dissipation values of down to 67 μW/gate while maintaining gate delays of approximately 200 ps. In addition, speed-power products of less than 6 fJ have been obtained using these C-HIGFET ring oscillators. The C-HIGFET technology has been used to fabricate 1-kb static random access memories (SRAMs) with yields of over 26% on a 3-inch wafer. Read access times as low as 1.8 ns were obtained for 1K SRAMs at a power of 650 mW. The 1K SRAM exhibited a significant reduction in power to 90 mW at a somewhat longer read access time of 4.4 ns.

Original languageEnglish (US)
Title of host publicationTechnical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit)
PublisherPubl by IEEE
Pages143-146
Number of pages4
StatePublished - Oct 1 1990
Event12th Annual IEEE Gallium Arsenide Integrated Circuit Symposium - GaAs IC - New Orleans, LA, USA
Duration: Oct 7 1990Oct 10 1990

Other

Other12th Annual IEEE Gallium Arsenide Integrated Circuit Symposium - GaAs IC
CityNew Orleans, LA, USA
Period10/7/9010/10/90

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    Grider, D. E., Akinwande, A. I., Mactaggart, R., Ruden, P. P., Nohava, J. C., Nohava, T. E., Breezley, J. E., Joslyn, P., & Tetzlaff, D. (1990). Development of static random access memories using complementary heterostructure insulated gate field effect transistor technology. In Technical Digest - GaAs IC Symposium (Gallium Arsenide Integrated Circuit) (pp. 143-146). Publ by IEEE.