Abstract
A new concept for packaging high frequency monolithic circuits is presented. It consists of developing miniaturized housings to shield individual passive components (e.g., CPW based), active elements, or combinations of them by employing silicon micromachining technology. At high frequencies, self-packaged configurations that are fabricated in this manner provide reduction in the overall size and weight of a circuit and provide increased isolation between neighboring circuits. Therefore, the resulting characteristics make these micropackaged components appropriate for high density, multilevel interconnect circuits. This paper will describe the fabrication procedures used to develop self-packaged components. Performance curves for typical high frequency circuit geometries that are implemented in this configuration are shown for measured and theoretical results.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 2073-2080 |
| Number of pages | 8 |
| Journal | IEEE Transactions on Microwave Theory and Techniques |
| Volume | 43 |
| Issue number | 9 |
| DOIs | |
| State | Published - Sep 1995 |
Bibliographical note
Funding Information:Manuscript received September 26, 1993; revised May 25,1995. This work was supported by thc Office ot‘ Naval Research Contrncl YOO014-9?-J1070 and the Army Research Office. The authors are with The Radiation Laboratory, Electrical Engineering and Computer Science Department, The University of Michigan, Ann Arbor, MI 48109-2122 USA. IEEE Log Number 9313439.
