In this paper, we present the overall design of the Agassiz compiler . The Agassiz compiler is an integrated compiler targeting the concurrent multithreaded architectures [12,13]. These architectures can exploit both looplevel and instruction-level parallelism for general-purpose applications (such as those in SPEC benchmarks). They also support various kinds of control and data speculation, runtime data dependence checking, and fast synchronization and communication mechanisms. The Agassiz compiler has a loop-level parallelizing compiler as its front-end and an instruction-level optimizing compiler as its back-end to support such architectures. In this paper, we focus on the IR design of the Agassiz compiler and describe how we support the front-end analyses, various optimization techniques, and source-to-source translation.
|Original language||English (US)|
|Title of host publication||Languages and Compilers for Parallel Computing - 12th International Workshop, LCPC 1999, Proceedings|
|Editors||Larry Carter, Jeanne Ferrante|
|Number of pages||19|
|State||Published - 2000|
|Event||12th International Workshop on Languages and Compilers for Parallel Computing, LCPC 1999 - La Jolla, United States|
Duration: Aug 4 1999 → Aug 6 1999
|Name||Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)|
|Other||12th International Workshop on Languages and Compilers for Parallel Computing, LCPC 1999|
|Period||8/4/99 → 8/6/99|
Bibliographical notePublisher Copyright:
© Springer-Verlag Berlin Heidelberg 2000.