Designing LC VCOs using capacitive degeneration techniques

Byunghoo Jung, Ramesh Harjani

Research output: Contribution to journalArticlepeer-review

3 Scopus citations

Abstract

In this paper, we present a detailed analysis of VCOs using a capacitively degenerated negative resistance cell. The negative resistance cell using capacitive degeneration has a higher maximum attainable oscillation frequency and a smaller equivalent shunt capacitance when compared to the widely used cross-coupled negative-gm cell. These properties are of particular interest for the design of high-frequency and/or wide tuning range VCOs. The negative resistance provided by a traditional capacitively degenerated negative resistance cell is lower than that provided by a cross-coupled negative-g m cell. We present an active capacitive degeneration topology that overcomes this limitation. To validate this circuit topology we use two test vehicles. The first test vehicle is a 5.3 GHz VCO designed in a 0.25 μm CMOS technology and the second test vehicle is a 20 GHz VCO designed in a 0.25 μm BiCMOS technology. Measurement and simulation results from both test vehicles effectively demonstrate the efficacy of the capacitive degeneration technique.

Original languageEnglish (US)
Pages (from-to)319-351
Number of pages33
JournalInternational Journal of High Speed Electronics and Systems
Volume15
Issue number2
DOIs
StatePublished - Jun 1 2005

Keywords

  • Analog integrated circuits
  • BiCMOS integrated circuits
  • Capacitive degeneration
  • High-frequency LC oscillators
  • Negative resistance cell
  • Voltage-controlled oscillators

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