Design techniques for pulsed static CMOS

Kavitha Seshadri; Adrianne Pontarelli; Gauri Joglekar; Gerald E Sobelman

Design techniques for pulsed static CMOS

Kavitha Seshadri, Adrianne Pontarelli, Gauri Joglekar, Gerald E Sobelman

Electrical and Computer Engineering

Research output: Contribution to journal › Conference article › peer-review

1 Scopus citations

Abstract

This paper gives new results in the design of Pulsed Static CMOS circuits. In particular, a new method of circuit duplication has been proposed which is particularly useful for the implementation of arithmetic functions. An array multiplier and a carry-select adder are used as representative design examples. Simulation results confirm that these Pulsed Static CMOS circuits operate correctly and have greater throughput than traditional static designs.

Original language	English (US)
Pages (from-to)	II929-II932
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2
State	Published - 2004
Event	2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, Canada Duration: May 23 2004 → May 26 2004

Find It

Find It at U of M Libraries

Cite this

@article{d9325823f8c541deac376c42f179a601,

title = "Design techniques for pulsed static CMOS",

abstract = "This paper gives new results in the design of Pulsed Static CMOS circuits. In particular, a new method of circuit duplication has been proposed which is particularly useful for the implementation of arithmetic functions. An array multiplier and a carry-select adder are used as representative design examples. Simulation results confirm that these Pulsed Static CMOS circuits operate correctly and have greater throughput than traditional static designs.",

author = "Kavitha Seshadri and Adrianne Pontarelli and Gauri Joglekar and Sobelman, \{Gerald E\}",

year = "2004",

language = "English (US)",

volume = "2",

pages = "II929--II932",

journal = "Proceedings - IEEE International Symposium on Circuits and Systems",

issn = "0271-4310",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "2004 IEEE International Symposium on Cirquits and Systems - Proceedings ; Conference date: 23-05-2004 Through 26-05-2004",

}

TY - JOUR

T1 - Design techniques for pulsed static CMOS

AU - Seshadri, Kavitha

AU - Pontarelli, Adrianne

AU - Joglekar, Gauri

AU - Sobelman, Gerald E

PY - 2004

Y1 - 2004

N2 - This paper gives new results in the design of Pulsed Static CMOS circuits. In particular, a new method of circuit duplication has been proposed which is particularly useful for the implementation of arithmetic functions. An array multiplier and a carry-select adder are used as representative design examples. Simulation results confirm that these Pulsed Static CMOS circuits operate correctly and have greater throughput than traditional static designs.

AB - This paper gives new results in the design of Pulsed Static CMOS circuits. In particular, a new method of circuit duplication has been proposed which is particularly useful for the implementation of arithmetic functions. An array multiplier and a carry-select adder are used as representative design examples. Simulation results confirm that these Pulsed Static CMOS circuits operate correctly and have greater throughput than traditional static designs.

UR - https://www.scopus.com/pages/publications/4344654099

UR - https://www.scopus.com/inward/citedby.url?scp=4344654099&partnerID=8YFLogxK

M3 - Conference article

AN - SCOPUS:4344654099

SN - 0271-4310

VL - 2

SP - II929-II932

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

T2 - 2004 IEEE International Symposium on Cirquits and Systems - Proceedings

Y2 - 23 May 2004 through 26 May 2004

ER -

Design techniques for pulsed static CMOS

Abstract

Find It

Other files and links

Fingerprint

Cite this