This paper gives new results in the design of Pulsed Static CMOS circuits. In particular, a new method of circuit duplication has been proposed which is particularly useful for the implementation of arithmetic functions. An array multiplier and a carry-select adder are used as representative design examples. Simulation results confirm that these Pulsed Static CMOS circuits operate correctly and have greater throughput than traditional static designs.
|Original language||English (US)|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|State||Published - Sep 7 2004|
|Event||2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, Canada|
Duration: May 23 2004 → May 26 2004