Design space exploration for efficient computing in Solid State drives with the Storage Processing Unit

Manas Minglani, Ashwin Nagarajan, Sneha Deshapande, Luke Everson, David J Lilja

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Computer architects face two major challenges in building future exa-scale systems: high energy consumption and the increasing gap between processor and storage speeds. Moving the processing closer to the data, inside the persistent storage, will help mitigate these challenges. This will result in a hierarchical compute structure across the system with a major component of the processing hierarchy inside the Solid State Drive. This new architecture is called the Storage Processing Unit. We perform design space exploration and propose several optimizations to the application space and the architectural space. This research significantly improves the energy use and performance of the system. We observe energy savings from 11-423X and performance gains from 4-66X for applications including k-means, Sparse BLAS, and others.

Original languageEnglish (US)
Title of host publicationProceedings of the 2015 IEEE International Conference on Networking, Architecture and Storage, NAS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages87-94
Number of pages8
ISBN (Electronic)9781467378918
DOIs
StatePublished - Sep 10 2015
Event10th IEEE International Conference on Networking, Architecture and Storage, NAS 2015 - Boston, United States
Duration: Aug 6 2015Aug 7 2015

Other

Other10th IEEE International Conference on Networking, Architecture and Storage, NAS 2015
CountryUnited States
CityBoston
Period8/6/158/7/15

Keywords

  • Active flash
  • energy-efficient computing
  • hierarchical computation
  • performance evaluation
  • SSD architecture
  • storage systems

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