Design of PVT tolerant inverter based circuits for low supply voltages

Ramesh Harjani, Rakesh Kumar Palani

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Scopus citations

Abstract

The design of differential pair based OTAs is becoming increasingly difficult in finer geometries due to lower supply voltages. Inverter based designs have proven to have better transconductance efficiency, higher swing and better linearity but have degraded CMRR, worse PSRR and limited PVT tolerance. In this tutorial, we discuss traditional amplifiers and why inverter based amplifiers are better suited for lower supplies. We then describe the design procedure for inverter based OTA designs with an emphasis on improving their performance, including PVT tolerance, CMRR and PSRR. In particular, we introduce new biasing techniques for inverters to improve their PVT tolerance. We finally validate our designs using measurement results from a number of fabricated designs.

Original languageEnglish (US)
Title of host publication2015 IEEE Custom Integrated Circuits Conference, CICC 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479986828
DOIs
StatePublished - Nov 25 2015
EventIEEE Custom Integrated Circuits Conference, CICC 2015 - San Jose, United States
Duration: Sep 28 2015Sep 30 2015

Publication series

NameProceedings of the Custom Integrated Circuits Conference
Volume2015-November
ISSN (Print)0886-5930

Other

OtherIEEE Custom Integrated Circuits Conference, CICC 2015
CountryUnited States
CitySan Jose
Period9/28/159/30/15

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