Abstract
This paper presents novel approaches for pipelining of parallel nested multiplexer loops and decision feedback equalizers (DFEs) based on look-ahead techniques. Look-ahead techniques can be applied to pipeline a nested multiplexer loop in many possible ways. It is shown that not all the look-ahead approaches necessarily result in improved performance. A novel look-ahead approach is identified, which can guarantee improvement in performance either in the form of pipelining or parallelism. The proposed technique is demonstrated and applied to design multiplexer-loop-based DFEs with throughput in the range of 3.125-10 Gb/s.
Original language | English (US) |
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Pages (from-to) | 489-493 |
Number of pages | 5 |
Journal | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
Volume | 13 |
Issue number | 4 |
DOIs | |
State | Published - Apr 2005 |
Keywords
- Decision feedback equalizers (DFEs)
- Look-ahead
- Multiplexer loop
- Pipelining