Design of low-error fixed-width modified booth multiplier

Kyung Ju Cho; Kwang Chul Lee; Jin Gyun Chung; Keshab K. Parhi

doi:10.1109/TVLSI.2004.825853

Design of low-error fixed-width modified booth multiplier

Kyung Ju Cho, Kwang Chul Lee, Jin Gyun Chung, Keshab K. Parhi

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

173 Scopus citations

Abstract

This paper presents an error compensation method for a modified Booth fixed-width multiplier that receives a W-bit input and produces a W-bit product. To efficiently compensate for the quantization error, Booth encoder outputs (not multiplier coefficients) are used for the generation of error compensation bias. The truncated bits are divided into two groups depending upon their effects on the quantization error. Then, different error compensation methods are applied to each group. By simulations, it is shown that quantization error can be reduced up to 50% by the proposed error compensation method compared with the existing method with approximately the same hardware overhead in the bias generation circuit. It is also shown that the proposed method leads to up to 35% reduction in area and power consumption of a multiplier compared with the ideal multiplier.

Original language	English (US)
Pages (from-to)	522-531
Number of pages	10
Journal	IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume	12
Issue number	5
DOIs	https://doi.org/10.1109/TVLSI.2004.825853
State	Published - May 2004

Bibliographical note

Funding Information:
Manuscript received August 3, 2002; revised April 3, 2003. This work was supported by the Ministry of Information and Communications, Korea, under the Information Technology Research Center (ITRC) Support Program. K.-J. Cho and J.-G. Chung are with the Department of Electronic and Information Engineering, and with the Information and Communication Research Institute, Chonbuk National University, Chonju 561-756, Korea (e-mail: [email protected]). K.-C. Lee is with Samsung Thales Company, Yongin 449-712, Korea. K. K. Parhi is with Broadcom Corporation, Irvine, CA, on leave from the Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55401 USA (e-mail: [email protected]). Digital Object Identifier 10.1109/TVLSI.2004.825853

Keywords

Approximate carry
Fixed-width multiplier
Modified booth multiplier
Quantization

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10.1109/TVLSI.2004.825853

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abstract = "This paper presents an error compensation method for a modified Booth fixed-width multiplier that receives a W-bit input and produces a W-bit product. To efficiently compensate for the quantization error, Booth encoder outputs (not multiplier coefficients) are used for the generation of error compensation bias. The truncated bits are divided into two groups depending upon their effects on the quantization error. Then, different error compensation methods are applied to each group. By simulations, it is shown that quantization error can be reduced up to 50% by the proposed error compensation method compared with the existing method with approximately the same hardware overhead in the bias generation circuit. It is also shown that the proposed method leads to up to 35% reduction in area and power consumption of a multiplier compared with the ideal multiplier.",

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note = "Funding Information: Manuscript received August 3, 2002; revised April 3, 2003. This work was supported by the Ministry of Information and Communications, Korea, under the Information Technology Research Center (ITRC) Support Program. K.-J. Cho and J.-G. Chung are with the Department of Electronic and Information Engineering, and with the Information and Communication Research Institute, Chonbuk National University, Chonju 561-756, Korea (e-mail: [email protected]). K.-C. Lee is with Samsung Thales Company, Yongin 449-712, Korea. K. K. Parhi is with Broadcom Corporation, Irvine, CA, on leave from the Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55401 USA (e-mail: [email protected]). Digital Object Identifier 10.1109/TVLSI.2004.825853",

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N2 - This paper presents an error compensation method for a modified Booth fixed-width multiplier that receives a W-bit input and produces a W-bit product. To efficiently compensate for the quantization error, Booth encoder outputs (not multiplier coefficients) are used for the generation of error compensation bias. The truncated bits are divided into two groups depending upon their effects on the quantization error. Then, different error compensation methods are applied to each group. By simulations, it is shown that quantization error can be reduced up to 50% by the proposed error compensation method compared with the existing method with approximately the same hardware overhead in the bias generation circuit. It is also shown that the proposed method leads to up to 35% reduction in area and power consumption of a multiplier compared with the ideal multiplier.

AB - This paper presents an error compensation method for a modified Booth fixed-width multiplier that receives a W-bit input and produces a W-bit product. To efficiently compensate for the quantization error, Booth encoder outputs (not multiplier coefficients) are used for the generation of error compensation bias. The truncated bits are divided into two groups depending upon their effects on the quantization error. Then, different error compensation methods are applied to each group. By simulations, it is shown that quantization error can be reduced up to 50% by the proposed error compensation method compared with the existing method with approximately the same hardware overhead in the bias generation circuit. It is also shown that the proposed method leads to up to 35% reduction in area and power consumption of a multiplier compared with the ideal multiplier.

KW - Approximate carry

KW - Fixed-width multiplier

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KW - Quantization

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Design of low-error fixed-width modified booth multiplier

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