Design of high-performance DSP systems

Keshab K Parhi, Francky Catthoor

Research output: Contribution to journalConference articlepeer-review

1 Scopus citations


This tutorial presents system level design approaches for implementation of high-performance real-time DSP systems. The emphasis is on tradeoffs with respect to area, power and speed using design approaches ranging from algorithm level to architecture level to implementation levels. The topics covered include design of fast digital filters and transforms, low power system design using techniques such as supply voltage reduction, retiming, number splitting, memory access reduction, implementation styles such as synchronous, self-timed, and wave pipelining, implementation of arithmetic modules using two's complement and redundant numbers, high-level transformations such as retiming, folding, architecture exploration using clustering, sharing, partitioning, hardware-software codesign, and scheduling and synthesis.

Original languageEnglish (US)
Pages (from-to)447-507
Number of pages61
JournalProceedings - IEEE International Symposium on Circuits and Systems
StatePublished - Jan 1 1996


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