Design and analysis of MoS₂-based MOSFETs for ultra-low-leakage dynamic memory applications

Transition metal dichalcogenides (TMDs) have been of tremendous interest recently for a wide range of electronic and photonic device applications. One of the most promising TMD for scaled transistors is molybdenum disulfide (MoS ₂) [1], and several recent reports have shown promising performance and scalability for MoS₂ MOSFETs [2-3]. However, one aspect of these devices that has not received significant attention is their potential for extremely-low leakage operation. Monolayer MoS₂ is an ideal material for use in static and dynamic random access memories since its large effective mass and wide band gap are expected to suppress gate induced drain leakage (GIDL) arising from band-to-band tunneling (Fig. 1), while its monolayer nature should enable improved scalability compared to silicon. In order to realize its potential for low-leakage applications, careful modeling and design space analysis is needed. In this work, we describe the design space required to realize two-dimensional (2D) MoS₂ low-leakage MOSFETs. We combine TCAD electrostatic simulations with an analytical transport model to predict the subthreshold performance of MoS₂ MOSFETs. We further apply this model to a dynamic memory cell design and benchmark the performance advantages compared to conventional low-leakage silicon technology.