Design a co-processor for output probability calculation in speech recognition

Li Peng; Hua Tang

doi:10.1109/ISCAS.2009.5117762

Design a co-processor for output probability calculation in speech recognition

Li Peng, Hua Tang

Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Scopus citations

Abstract

In the CHMM (Continuous Hidden Markov Model) based speech recognition algorithm, Output Probability Calculation (OPC) is the most computation- intensive part. To reduce power consumption and design cost, this paper presents a custom-designed co-processor to implement OPC. The standard SRAM interface of the co-processor allows it to be controlled by various micro-controllers. The co-processor has been implemented in standard-cell based approach and manufactured in 0.18μm UMC technology. Tested with a 358-state 3-mixture 27-feature 800-word HMM, the co-processor operates at 10MHz to meet real-time requirement. The power consumption of this co-processor is 1.6mW, and the die size is 1.18mm².

Original language	English (US)
Title of host publication	2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Pages	369-372
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2009.5117762
State	Published - Oct 26 2009
Event	2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan, Province of China Duration: May 24 2009 → May 27 2009

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Other

Other	2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Country/Territory	Taiwan, Province of China
City	Taipei
Period	5/24/09 → 5/27/09

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10.1109/ISCAS.2009.5117762

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Peng, L & Tang, H 2009, Design a co-processor for output probability calculation in speech recognition. in 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009., 5117762, Proceedings - IEEE International Symposium on Circuits and Systems, pp. 369-372, 2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009, Taipei, Taiwan, Province of China, 5/24/09. https://doi.org/10.1109/ISCAS.2009.5117762

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title = "Design a co-processor for output probability calculation in speech recognition",

abstract = "In the CHMM (Continuous Hidden Markov Model) based speech recognition algorithm, Output Probability Calculation (OPC) is the most computation- intensive part. To reduce power consumption and design cost, this paper presents a custom-designed co-processor to implement OPC. The standard SRAM interface of the co-processor allows it to be controlled by various micro-controllers. The co-processor has been implemented in standard-cell based approach and manufactured in 0.18μm UMC technology. Tested with a 358-state 3-mixture 27-feature 800-word HMM, the co-processor operates at 10MHz to meet real-time requirement. The power consumption of this co-processor is 1.6mW, and the die size is 1.18mm2.",

author = "Li Peng and Hua Tang",

year = "2009",

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doi = "10.1109/ISCAS.2009.5117762",

language = "English (US)",

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series = "Proceedings - IEEE International Symposium on Circuits and Systems",

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AB - In the CHMM (Continuous Hidden Markov Model) based speech recognition algorithm, Output Probability Calculation (OPC) is the most computation- intensive part. To reduce power consumption and design cost, this paper presents a custom-designed co-processor to implement OPC. The standard SRAM interface of the co-processor allows it to be controlled by various micro-controllers. The co-processor has been implemented in standard-cell based approach and manufactured in 0.18μm UMC technology. Tested with a 358-state 3-mixture 27-feature 800-word HMM, the co-processor operates at 10MHz to meet real-time requirement. The power consumption of this co-processor is 1.6mW, and the die size is 1.18mm2.

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ER -

Design a co-processor for output probability calculation in speech recognition

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