DATA PREFETCHING IN SHARED MEMORY MULTIPROCESSORS.

Roland L. Lee, Pen Chung Yew, Duncan H. Lawrie

Research output: Chapter in Book/Report/Conference proceedingConference contribution

28 Scopus citations

Abstract

The trace-driven simulation of 16 numerical subroutines is used to compare instruction lookahead and data prefetching with private caches in shared-memory multiprocessors with hundreds or thousands of processors and memory modules interconnected with a pipelined network. These multiprocessors are characterized by long memory-access delays that create a memory-access bottleneck. Using the multiprocessor cache model of R. L. Lee et al. (1987) for comparison, data prefetching is found to be more effective than caches in addressing the memory-access bottleneck.

Original languageEnglish (US)
Title of host publicationProceedings of the International Conference on Parallel Processing
EditorsSartaj K. Sahni
PublisherPennsylvania State Univ Press
Pages28-31
Number of pages4
ISBN (Print)0271006080
StatePublished - Dec 1 1987
EventProc Int Conf Parallel Process 1987 - Universal Park, PA, USA
Duration: Aug 17 1987Aug 21 1987

Publication series

NameProceedings of the International Conference on Parallel Processing
ISSN (Print)0190-3918

Other

OtherProc Int Conf Parallel Process 1987
CityUniversal Park, PA, USA
Period8/17/878/21/87

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  • Cite this

    Lee, R. L., Yew, P. C., & Lawrie, D. H. (1987). DATA PREFETCHING IN SHARED MEMORY MULTIPROCESSORS. In S. K. Sahni (Ed.), Proceedings of the International Conference on Parallel Processing (pp. 28-31). (Proceedings of the International Conference on Parallel Processing). Pennsylvania State Univ Press.