Abstract
Several generic parallel formulations of the Backpropagation learning algorithm have been proposed recently. Further speedups are possible by customizing parallel formulations to the architecture of the neural network. This paper addresses the issue of customizing parallel formulations of Backpropagation learning algorithm to a given neural network architecture on multiprocessors with hypercube-like communication topology. We introduce a new parallel formulation called Rectangular Checkerboarding which adapts to the network architecture and can provide performance gains for non-uniform neural networks, where the number of nodes vary across the layers. Algebraic analysis shows that each instance of rectangular checkerboarding (using a specific rectangular processor grid) is optimal for an important family of network architectures. Experiments on CM-5 show that customizing to network architecture can provide significant (- 50%) performance gains for many interesting non-uniform neural network architectures, which are currently used in important applications. We also introduce the Staircase framework, which can use different processor grids for different layers of a neural network.
Original language | English (US) |
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Pages (from-to) | 181-189 |
Number of pages | 9 |
Journal | IEEE Symposium on FPGAs for Custom Computing Machines, Proceedings |
DOIs | |
State | Published - 1994 |
Externally published | Yes |
Event | Proceedings of the 6th International Conference on Tools with Artificial Intelligence - New Orleans, LA, USA Duration: Nov 6 1994 → Nov 9 1994 |
Bibliographical note
Publisher Copyright:© 1994 IEEE Computer Society. All rights reserved.