Cost-quality trade-offs of approximate memory repair mechanisms for image data

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

The traditional approach for increasing yield in large memory arrays has been to eliminate all hard errors using repair mechanisms. However, the cost of these mechanisms can become prohibitive for cheaper memories, which have higher error rates. Instead of completely repairing faulty cells, this paper introduces new approximate memory repair mechanisms that only partially repair both CMOS DRAMs and STT-MRAMs. By combining redundant repair with unequal protection, such as skewing the limited spare elements available for repairing faults towards the k most significant bits, and a hybrid bit-shuffling and redundant repair scheme, the new mechanisms maintain excellent output quality while substantially reducing the cost of the repair mechanism, particularly for increasingly important cluster faults.

Original languageEnglish (US)
Title of host publicationProceedings of the 18th International Symposium on Quality Electronic Design, ISQED 2017
PublisherIEEE Computer Society
Pages438-444
Number of pages7
ISBN (Electronic)9781509054046
DOIs
StatePublished - May 2 2017
Event18th International Symposium on Quality Electronic Design, ISQED 2017 - Santa Clara, United States
Duration: Mar 14 2017Mar 15 2017

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Other

Other18th International Symposium on Quality Electronic Design, ISQED 2017
CountryUnited States
CitySanta Clara
Period3/14/173/15/17

Keywords

  • Approximate memory repair
  • CMOS DRAMs
  • STT-MRAMs
  • unequal protection

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