Concurrent Architectures for Two-Dimensional Recursive Digital Filtering

Keshab K. Parhi, David G. Messerschmitt

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29 Scopus citations


This paper presents new efficient architectures for high-speed implementation of direct form and local state-space form two-dimensional recursive digital filters. Unlike one-dimensional recursive systems, two-dimensional recursive digital filter algorithms possess a large amount of inherent concurrency, which can be exploited for fine-grain pipelining and/or parallelism. The locus of these concurrent computations is referred to as the concurrent computation region. We exploit this concurrency to derive fine-grain pipelined and one-dimensional block architectures for implementation of two-dimensional recursive digital filters by appropriate interleaving (or indexing) of the input samples, without requiring any algorithm transformation and without any hardware overhead. We extend the lookahead computation and incremental computation techniques to two dimensions, and use these to derive new two-dimensional incremental block filter architectures. The multiplication complexity of our two-dimensional incremental block filter is 0(max [formula omitted], as opposed to [formula omitted] of existing block structures, where L1 X L2 corresponds to the block size. Fine-grain pipelined two-dimensional block structures are also presented. The index mapping functions are used to derive delay operators for various architectures.

Original languageEnglish (US)
Pages (from-to)813-829
Number of pages17
JournalIEEE transactions on circuits and systems
Issue number6
StatePublished - Jun 1989

Bibliographical note

Funding Information:
December 5, 1988. This work was supported in part by grants from the Advanced Research Projects Agency monitored by the Naval Electronics Systems Command under Contract N00039-86-R-0365, by the National Science Foundation under Contract DCI-85-17339, and by an IBM Fellowship, and by an University of California Regents Fellowship. This paper was recommended by Associate Editor H. Gharavi. K. K. Parhi is with the Department of Electrical Engineering, University of Mnnesota, Mnneapolis, h4N 55455. D. G. Messerschmitt is with the Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, CA 94720. IEEE Log Number 8827400.


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